Platform voltage-droop improvement from backside power on Intel's PowerVia test chip; Intel also reported a 6% frequency benefit
>30%observed
| Value kind | observed — Reported measurements, counts, and specifications keep the precision and scope stated by their source; an exact specification is not treated as a range. |
|---|---|
| Scope | One Intel test chip, presented at VLSI 2023. A droop and frequency result inside the silicon, not a converter-efficiency or system-loss gain. |
| As of | 2023-06 |
| Source | Intel press release, 'PowerVia Test Shows Industry-Leading Performance' (2023-06-05) · “The test also showed more than 30% platform voltage droop improvement and 6% frequency benefit.” |
| Review | checking…review by 2027-10-19 · slow cadence |
| Recorded changes | last 2026-10-19 · 2 revisions tracked |
| Claim id | on-die-ir-voltage-droop-reduction-from-backside |
Where the guide uses it
← Full numbers register — every date-stamped figure in the guide, with revision history.