The Definitive Guide toAI Data Centers
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Chapter 4.5

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UPS & Energy Storage: From Ride-Through to Transient Absorption

UPS and storage now do two jobs: carry the load when the utility disappears, and absorb the synchronized GPU load step every few seconds. Size and prove each duty separately at the chip, rack and facility layers, so smoothing never spends the outage reserve.

ThreadsPower-boundGoodput

What you'll decide here

  1. Whether storage can ride through a utility blip and absorb a synchronized GPU load step. Size them separately, then pick chemistry, placement and end-of-life reserve.
  2. Central double-conversion UPS, rack BBU (ORV3), block-redundant catcher or medium-voltage UPS? That sets your failure domain, stranded capacity and whether eco-mode is ever justified.
  3. Where storage sits on the chip-to-BESS spine, how many usable joules each layer delivers, and who commands smoothing. A missing layer sends the transient downstream.
  4. Chemistry: VRLA, LFP, supercapacitor or hybrid, sized to the product's peak (Max P) and transient profile, inside the facility's cabinet design basis, not chip TDP.
  5. How you meter, acceptance-test and contract the smoothing claim: utility ramp limits, tenant provisioning ratio, commissioning step-load tests. An unproven claim strands an interconnection slot.
A relay of storage layers catches the synchronized GPU load step before it reaches the grid. Each handoff needs enough power, usable energy, response speed and recharge capacity, or the residual reaches the substation.

For thirty years the static UPS had one job: stand between the utility and the IT load, ride through sub-cycle disturbances and the few seconds a standby generator needs to start and accept load, and otherwise stay invisible. Sizing was a runtime question (five minutes, ten, fifteen) and topology a reliability question (N+1 or 2N). The battery was an insurance policy you hoped never to cash. Inside an AI hall that model no longer holds.

The reason is the load. A rack of GPUs running a synchronous collective is not a steady, power-factor-corrected load. It is workload-synchronized: thousands of accelerators step between idle and full power in lockstep, on the cadence of the training step (NVIDIA, July 2025). A GB300 NVL72 imposes synchronized rack-level load steps, and across a hall and a campus that swing becomes a multi-hundred-megawatt step the transformer, the generator and ultimately the grid all have to absorb. The harmonics the same load creates are a separate point, covered in Chapter 4.4.

The grid has already shown the coupling running the other way. On 22 July 2026 a single normally cleared Ashburn 230 kV fault sent roughly 3.8 GW of data-center demand to backup power, about two and a half times the 2024 scale, according to a preliminary PJM and Dominion account. Two years earlier, in July 2024, ~1,500 MW left the grid during a transmission-fault sequence as facilities transferred to backup, and the May 2026 NERC Level 3 alert followed it. There the grid disturbed the fleet; here the fleet disturbs the grid. The UPS, and the storage stack it has grown into, is now the main tool for shaping that load, not only for surviving its loss. Those drops came from the same equipment: the UPS and the rack BBU decide whether a site rides out a normally cleared sag on grid power or switches to its own storage. ERCOT's NOGRR 282 and SPP's large-load rules now oblige new large loads to ride through such sags or, if they do transfer, to come back within about a second, which puts those transfer settings in the ride-through study (Chapter 4.10).

This chapter owns the power-transient problem and its mitigation. It traces the topology forks (double-conversion vs eco-mode; central vs distributed vs catcher), the chemistry options (VRLA, LFP, and supercapacitors for the sub-millisecond edge) and the spine that ties them together: on-package capacitance, rack BBU, facility BESS, each layer catching a different timescale of the same spike. Chapter 7.12 engineers the on-die origin of the transient. Chapter 5.12 covers its cooling-side twin, the loss-of-flow transient and its product-specific thermal response, and Chapter 4.10 the grid-facing obligation it creates. Here we own the storage, the metering and the acceptance.

Outage continuity and repetitive smoothing: two duties

Two timescales separate the legacy problem from the AI one. Ride-through in the backup sense is a rare, large, slow event: the utility drops, and storage must carry the full load for seconds to minutes until the generator picks up. Transient absorption is a continuous, smaller, fast event: the GPUs create a load step every few seconds, and storage must inject or absorb power in milliseconds to keep the spike from propagating upstream. Load steps on a millisecond-to-cycle timescale are within what a central double-conversion UPS can regulate at its output. Whether it also keeps repeated workload swings off the facility input depends on source impedance, its DC-link and storage controls, the repetitive duty it allows, and how much of the swing you measure passing through to its input.

Miss this reframe and the cost is concrete. Size only for ride-through, without testing repetitive smoothing, and the storage stack may pass the synchronized swing upstream. Every load step then reaches your transformer (flicker and harmonic resonance, see Chapter 4.4), your behind-the-meter generator and the grid. A running generator responds at once through electromagnetic torque and inertia. Its governor and fuel response, and starting a generator that is offline, each have their own limits (see Chapter 4.8). At the grid, the swing becomes the utility's ramp-rate and stability problem. A layered stack puts the fastest, smallest storage close to the silicon and the slowest, largest at the facility. Choose the interfaces that cover the residual step, and reserve outage energy as a separate duty.

UPS topology: double-conversion, eco-mode, and when bypass is honest

The first fork is the conversion topology, and it trades efficiency against protection. Double-conversion (VFI) rectifies incoming AC to DC and re-inverts it to clean AC that is decoupled from the input waveform. Galvanic isolation still needs a transformer, and most modern UPS are transformerless. The load never touches raw utility power, so this is the standard choice for non-linear, disturbance-sensitive loads. The cost is a standing conversion loss. Vertiv rates the double-conversion mode of its Liebert EXL S1 at up to 97% efficiency, so about 3% of the load, and more at light load, becomes heat. At gigawatt scale that is tens of megawatts, paid continuously, so read the installed efficiency curve at your planned loading.

Eco-mode (VFD) carries the load on filtered utility power through a static bypass and fires the inverter only on a disturbance, which pushes efficiency above 99% on the same datasheet. The price is a brief transfer time and exposure to upstream power quality in the window before transfer. Vertiv's Dynamic Online mode (VI with VFI support, rated up to 99%) works differently: the inverter stands ready to assume the load instantly and hold the output within IEC 62040-3 output-performance Class 1 (Appendix A), the class Vertiv gives double conversion. Other UPS makers sell their own parallel-inverter high-efficiency modes under their own names. Judge each on its transfer and output behavior at your load's harmonic spectrum, not on the mode's name and not as classic eco-mode.

The decision used to be simple: AI halls are non-linear and disturbance-sensitive, so eco-mode is reckless and you eat the double-conversion loss. The 2026 nuance is that storage is moving downstream, into the DC busbar and the rack. Where the central AC UPS survives, it is increasingly a ride-through and isolation device. Now that rack PSU capacitance and GPU power smoothing absorb the millisecond transient, helped where specified and proven by commanded BBU or supercap discharge, its eco-mode penalty deserves a second look. Eco-mode is justified only where (a) the rack layer demonstrably owns the fast transient and (b) the upstream source is clean enough that the transfer window carries no risk the load can't tolerate. Without both, double-conversion is the price of admission. Bypass belongs to the maintenance and fault path, never to steady-state efficiency for an unprotected non-linear load.

Backup architecture fork: central UPS vs distributed rack BBU vs catcher/block-redundant
ArchitectureWhere storage sitsResponse to fast transientTypical runtimeFailure domainStranded-capacity / footprint penaltyBest fit
Central double-conversion UPS (N+1 or 2N)Electrical room, upstream of the buswayVendor-specific: assess step response, source impedance, storage controls and repetitive duty5–12 minLarge: a UPS module backs many racks2N doubles UPS, battery and floor; worst footprintMixed/legacy halls; ride-through + isolation duty
Distributed rack BBU (OCP ORV3 48 V)In the rack / power shelf, on the 48 V busbarORV3 BBU v1.4: about 2 ms low-voltage qualification, then a ramp under 2 ms; commanded smoothing is a separate mode~4 min (rack BBU)Small: failure contained to one rack or shelfLow: storage scales 1:1 with IT; no 2N hallOCP/hyperscale dense racks; transient absorption
Catcher / block-redundant (3N/2, 4N/3)Shared reserve block catches a failed feedInherits the feed's storage; depends on layerPer feed (5–12 min)Block: a reserve covers N working blocksOne shared reserve block instead of a duplicate of every block: 33% spare at 4N/3, 50% at 3N/2, plus transfer switches. Availability depends on the transfer pathLarge facilities trading 2N capex for utilization
Facility BESS (in front of / beside the plant)Containerized, MV/LV-coupled at the campusSub-second: absorbs the residual that escapes the rackMinutes-to-hours (energy-sized)Campus: one stack, many dutiesLand, fire and thermal requirements; not IT-coupledSmoothing, DR, generator bridge, ride-through
2026 practitioner ranges. Runtimes are typical, not floors. Sources are in the key numbers below.

Read the table as four answers to one question: where does the joule live? They are not mutually exclusive. A facility may run several rows at once: a BESS for slow, large duties, rack BBUs for fast, local ones, and a central UPS or catcher block where the failure-domain or 2N requirement demands it. First decide which layer carries which duty at each load boundary, then pick only the interfaces you need to meet the measured voltage, ramp and outage requirements. The expensive mistake is provisioning the same joule twice: a full 2N central UPS and rack-level BBUs and a facility BESS all backing the same load because nobody drew the division-of-labor diagram.

A fifth option moves the UPS function up to medium voltage. A medium-voltage UPS puts batteries and converters inline on the MV bus, between the utility or on-site generation and a whole block or campus. One layer can then hold the site on the grid through sags, smooth the workload swing before it reaches the grid or an on-site turbine, and free indoor low-voltage space. In a joint release on 21 July 2026, Crusoe and ON.energy said Crusoe will put 5 GW of ON.energy's MV AI UPS into several campuses, with commissioning running from 2026 into 2027; ON.energy reports validating the system against ERCOT's NOGRR 282 ride-through rule. GE Vernova launched an MV-UPS on 24 August 2026 and expects to ship from mid-2027, with its first project energized in late 2027. The price is a failure domain the size of the MV block, a thin supplier base and no fleet record. The performance claims are the vendors' own, so ask for ride-through and step-response test traces at your load before you drop the low-voltage layer (on-site generation is in Chapter 4.8).

Central vs distributed: the failure-domain and stranded-capacity argument

The strategic shift of the era is from central to distributed storage, driven by two AI-specific pressures. The first is failure-domain economics. At AI scale a single central UPS module backs a large block of revenue-bearing GPUs, so its failure (or its maintenance bypass) is a large, correlated risk. Push the battery into the rack, as in the OCP ORV3 model where the battery backup unit (BBU) sits on the 48 V busbar inside the power shelf, and the electrical failure domain shrinks to a single rack. Rack storage shrinks the blast radius and the recovery capacity you need. It does not buy goodput by itself, because losing one rank a synchronous job needs can still restart the whole job. Before you claim a gain, compare interruption frequency, job placement, checkpoint and recovery behavior, and the workloads a failure leaves unaffected. The reliability math is in Chapter 12.2 and the recovery behavior in Chapter 9.4.

The second pressure is stranded capacity and footprint. A 2N central UPS doubles not just the UPS modules but the battery rooms and the floor they occupy, which is untenable when that floor could hold revenue GPUs and battery capex is a material line item. Distributed BBUs scale storage 1:1 with IT, so you add storage exactly where and when you add compute. They eliminate the dedicated 2N battery hall and the standing double-conversion loss, because the rack draws from the DC busbar. SemiAnalysis estimates (May 2026) that moving to distributed rack storage roughly halves total battery capacity, because the A-side and B-side central batteries are no longer duplicated, and avoids the 2–3% loss of the central AC-DC-AC UPS pair. Runtime and redundancy targets set what you actually install. Storage close to the load can also respond faster, but only if you test its trigger, converter, source-impedance and repetitive-duty response on the bus it connects to. The catch is operational: thousands of distributed cells mean thousands of state-of-charge and end-of-life events to manage, an orchestration problem the facility BESS and metering layers have to solve at fleet scale.

Deep dive: how the ORV3 48 V BBU actually behaves (the millisecond budget)

The Open Rack V3 power architecture is the reference implementation of distributed transient absorption, and its trigger behavior sets the response-time bar the whole stack is measured against. In normal operation the PSUs hold the busbar at 50.5–51 V, and the BBU discharges at 47.5–48 V (ORV3 BBU v1.4). When a synchronized GPU load step pulls the busbar down, the BBU spec (v1.4, §4.5) calls for ~2 ms of activation qualification at the ~48.5 V threshold (2 ms ±0.1 ms, marked TBD in the spec), followed by a ramp to full power in under 2 ms, with a control target that the busbar never drops below 46 V. The budget you specify and test runs from droop to full output: qualification plus ramp, not the ramp alone. Voltage-triggered backup also does not, on its own, suppress an arbitrary workload transient upstream. Section 4.3.3 describes a separate forced-discharge arrangement for peak shaving. If the central UPS and the grid are to stop seeing the full edge, specify and prove that mode too.

First-generation HPR shelves deliver on the order of ~33 kW each at ~660 A gross, or 27.5 kW usable at N+1, and a GB200-class rack carries roughly 6–8 shelves. PSU efficiency is a separate profile. Advanced Energy's 5.5 kW HPR PSU example lists 97.5% at peak, 96.5% across 30 to 100% load at 277 VAC, and a 50–49 V droop. OCP's HPR V2 shelf specification (Meta, 1.0.0, June 2026) defines a 1 OU shelf of 72 kW, or 60 kW at N+1 (Chapter 4.6), and wires its PSUs to the BBUs. Each PSU asserts AC_Loss 4–5 ms after it detects input loss, and the BBU shelf must then reach normal output within 5 ms. A Pulse_Mgmt_L line asks the BBUs to share a peak once PSU bulk capacitance is spent, and each BBU may refuse or stop, depending on its charge. The PSUs are specified to ride repetitive peaks of 140% for 50 ms and 160% for 400 µs without triggering backup, so specify BBU peak-sharing duty separately from outage runtime.

Below the BBU's millisecond regime sits the supercapacitor, which covers the sub-millisecond edge, the fastest di/dt that even a 2 ms BBU ramp can't catch. Below that sits on-package capacitance on the silicon itself (Chapter 7.12). The lesson is that no single device absorbs "the transient". A relay of devices does, each handing off to the next slower, larger one as the event lengthens: capacitor (µs), supercap (sub-ms), BBU (ms), BESS (sub-second to seconds), generator (seconds to minutes). Specify a gap in that relay and the transient simply skips to the next layer that can catch it, which is always larger, slower, and more expensive — and sometimes that layer is the grid.

Chemistry: VRLA → LFP, and the supercapacitor for the fast edge

The chemistry choice depends on the duty. VRLA (valve-regulated lead-acid) is cheap, heavy, short-lived (3–5 year replacement) and temperature-sensitive. LFP (lithium iron phosphate) beats VRLA on energy and power density and on cycle life, and its high C-rates fit the brief, hard discharges that make up the AI duty cycle. Against NMC lithium its advantage is thermal stability, which is far better and matters for fire risk and insurance at MWh scale. Compare VRLA, LFP and other lithium chemistries as alternatives; none is a settled default.

The decision-relevant number is usable kW per cabinet at the runtime you need, at end of life and at room temperature, not the C-rate. A 12C rating gives a five-minute discharge only as constant-current arithmetic (60 minutes divided by 12), not as constant-power runtime. Compare named cabinets at matched runtime, end-of-life derating, temperature and UPS voltage. For scale, Vertiv's EnergyCore Li5 data sheet (June 2026) lists 146, 234 and 263 kW for 10, 16 and 18 modules at five-minute end-of-life runtime, recommended at 20–30 °C. In July 2024 MPINarada announced a system that delivers 1 MW for five minutes from three cabinets, but the announcement gives no end-of-life basis for comparison. Whatever the chemistry, more kW per cabinet recovers floor that becomes revenue GPUs.

The specialist exception is the supercapacitor, which earns a place because no battery chemistry does everything. Batteries store a lot of energy and release it over minutes. Supercaps store little energy but release it in microseconds to milliseconds at very high power, across very many cycles, within their rated voltage and temperature limits. Inside the rated range, life and ESR still depend on temperature, voltage and repeated current. Eaton lists its supercapacitor backup modules for -40 to +65 °C. That makes them the right tool for the sub-millisecond GPU edge and for bridges that need huge instantaneous power for a very short time. It is why 800 VDC designs layer short-duration capacitor storage for the fast transient over batteries or a BESS for longer ride-through (SemiAnalysis, May 2026). Eaton's October 2025 800 VDC reference architecture supports NVIDIA's 800 VDC design and includes supercapacitors for fast-cycle backup. LITEON showcased that layer as rack hardware at OCP on 14 October 2026, a 108 kW Capacitor Backup Unit beside a 180 kW power shelf in an ORV3 rack. The release rates the unit only in kW, so ask for its usable energy per event in joules and its recharge time.

The design pattern is hybrid by timescale: supercap for power-dense, short duties, LFP for energy-dense, long ones. One storage type rarely covers both duties well. A supercapacitor's runtime is its usable stored energy divided by the load power, and a battery's edge response depends on its converter and controls, not on the cell. Pick storage for the power, energy, response and recharge each duty needs, and prove each one separately.

The mitigation spine: chip → BBU → BESS, by timescale

The synchronized GPU transient is absorbed by a relay of storage layers, each owning a timescale and an energy per event. On-die and on-package capacitance catches the fastest, smallest edge at the source (Chapter 7.12). The rack supercap or BBU catches the millisecond step on the 48 V (or HVDC) busbar before it leaves the rack. The facility BESS catches the residual that escapes the rack and the slower campus-scale swing, and also does the slow duties: generator bridging, demand response, ride-through. NVIDIA's published figures anchor the split. Its GB300 NVL72 power shelves integrate ~65 J/GPU of capacitor storage, and on a GB200 rack fitted with the new shelves NVIDIA measured a 30% cut in peak grid demand while training Megatron-LLM (July 2025). For Vera Rubin, NVIDIA describes roughly ~400 J/GPU (≈6×) in the power-shelf PSU capacitor system and says it cuts peak current demand by up to 25% (March 2026). That is deliberate over-provisioning of the on-rack layer so the grid sees a flatter load.

For the facility layer, NVIDIA's DSX Ready program (21 September 2026) qualifies BESS products against its reference design. The vendor runs NVIDIA's tests and NVIDIA reviews and approves the data; Hitachi Energy, LG Energy Solution and Tesla qualified at launch. NVIDIA says qualification does not replace site-level engineering or imply site-level stability, so the site's own studies and acceptance tests still decide (Chapter 13.4). In the US the BESS, its inverters and the UPS also face a sourcing check. Executive Order 14421 (August 26, 2026) lets DOE prohibit, condition or unwind purchases of bulk-power equipment from covered foreign entities, with rules due by December 24, 2026. DOE does not exclude data-center batteries or UPS just because they sit behind the meter, so confirm country of origin and supplier ownership before you sign (Chapter 2.3).

Allocation is the live argument: who owns each timescale, and who pays for it. Push more smoothing on-package and into the rack and you flatten the load before it reaches your transformer or generator, but you pay in silicon area, PSU volume (on GB300 roughly half the PSU volume is capacitance) and rack cost. Skimp on the rack layer and lean on the facility BESS and the grid, and you ship the transient onto slower equipment and, in the grid's case, equipment you cannot command. That invites utility ramp-rate limits, flicker charges or an outright interconnection condition. The frontier debate, unresolved in 2026, is how much belongs on-chip, in the rack, at the facility and on the grid, and whether utilities will mandate and meter a maximum ramp rate at the meter.

Sizing basis: assign TDP, peak/EDPp and reserve to their duties

The most common sizing error is applying one power number to every component. Use product-specific profiles: rack TDP for heat rejection and CDU duty, the facility design basis for irreversible upstream infrastructure, the operating (Max Q) profile for energy models, and peak (Max P) plus the power-versus-duration envelope for breaker, storage and protection design. NVIDIA's DSX reference design, for example, plans Vera Rubin NVL72 cabinets at 330 kW TDP as the facility basis for power and cooling, while OEM datasheets rate operating profiles at 188 kW Max Q and 228 kW Max P. Use the wrong field and you either overbuild the chain, clip load steps, throttle GPUs (lost goodput) or trip protection.

Flattening the peak also opens an oversubscription opportunity. Once capacitance, BBU, BESS and intelligent power capping are in place and demonstrably shaving the peak, you can provision the upstream chain below the naive sum of EDPp. That works only if measured smoothing, independent power limits, reachable reserve and the response to a loss of storage together keep the transformer and generator within their limits. Smoothing does not reduce sustained IT load, retained auxiliaries or storage recharge, and the utility's study has the last word. Microsoft Azure's fleet measurements (Patel et al., ASPLOS 2024) show how much room exists: about 3% unused power headroom available for oversubscription across the training fleet against about 21% across the inference fleet, because the transient signature differs by workload. Those are observations of what two fleets left unused, not margins either workload requires. The number you can defend is the one your own metering and capping policy produces.

The provisioning ratio you can defend, meaning how far below the EDPp sum you size the grid connection, depends directly on how much transient absorption you have proven and metered. Under-provision storage and you may have to over-provision the scarce, long-lead grid connection. Over-provision storage and you spend capex and floor on joules you don't use. The optimum sits between, and only measured data can find it, which is why metering and acceptance unlock the capital efficiency.

The energy fits, but only if the charger catches up. Define Ep = 2.0 MW × 10 s/(3.6 × 0.95), about 5.8 kWh, and Eo = 10 MW × 30 s/(3.6 × 0.95), about 88 kWh. Their unrounded sum is about 94 kWh, leaving about 6.4 kWh of the assumed 100 kWh. Peak discharge is 10 MW because the full outage load already includes the step. This screens energy and power; it does not prove a millisecond voltage response.

The 50 s between pulses needs AC recharge power Ep × 3.6/(50 s × 0.95) = 0.44 MW, so the assumed 0.50 MW spare passes. The cadence crossover is 10 s + Ep × 3.6/(0.50 × 0.95), about 54 s; a 54 s period still fails, so screen with the unrounded expression. At a 40 s period only 30 s is available for charging, which needs about 0.74 MW, so reserve drains even though each pulse fits. Keep the 60 s candidate only after you confirm reachable bus capacity and repetitive thermal life. Below the crossover, slow the workload pulse, add real charging headroom or resize. The storage supplier and controls integrator must supply end-of-life energy, temperature limits, response traces and a recharge test followed immediately by the outage case. Chapter 4.12 owns that acceptance handoff. Autonomous outage protection must stay effective when supervisory smoothing or telemetry fails.

Energy-storage placement in DC-disaggregated designs

As the rack interface on offer moves from AC-to-48 V conversion in the compute rack to disaggregated ±400 V / 800 VDC sidecar power, the storage question reopens. Chapter 4.7 owns the interface, including transformer-plus-rectifier and the SST option in Chapter 4.4. The question becomes where does the joule live in a DC world? The disaggregated answer moves AC-DC conversion, energy storage and eventually the SST out of the compute rack into a dedicated sidecar power rack feeding an HVDC busbar. That frees the IT rack for accelerators and isolates battery and conversion heat from the compute. Storage in this model sits in the sidecar on the DC bus, close enough to the load to keep the fast-transient advantage of distribution while consolidating the cells for serviceability and thermal containment. Delta showed an 800 VDC in-row power rack at OCP in October 2026 whose six modules, each a 110 kW shelf with an 80 kW BBU, give 660 kW of output and 480 kW of backup (15 October 2026). The release states no backup duration, so ask for it.

The placement fork has real consequences. Keep storage in the compute rack (ORV3-style BBU) and you maximize transient proximity but compete with GPUs for the most expensive floor and complicate cooling. Move it to the sidecar and you recover IT-rack space and isolate the thermal and fire risk, at the cost of a slightly longer (but still very short) electrical path to the load. Move it to a facility BESS and you get scale economics, easy DR participation and a clean fire boundary, but source impedance, reachable power, local capacitance and control response determine what millisecond edge remains. Where the tested facility path cannot handle that edge, add sidecar or rack storage. A DC-disaggregated design can use all three where a duty study justifies the interfaces: supercaps and BBUs at the rack or sidecar for the fast edge, a facility BESS for the slow duties, and a DC-bus state-of-charge scheme tying thousands of distributed elements into one controllable stack.

If CDU pumps run from the same DC bus, the pumps that stay on during an outage belong in the storage interface kW, the outage energy and the transfer test. Delta's two OCP releases describe two 800 VDC liquid-to-liquid CDUs: one rated 3.6 MW with three 25 kW pumps (8 October 2026), and a new unit rated up to 2.5 MW with three pumps in 3+0 (15 October 2026). In 3+0 all three pumps carry the duty with no spare, so size the DC-bus pump load for three and get the rating confirmed in writing. Neither release shows a shared-bus design (Chapter 5.12). Chapter 4.11 owns the grounding and ground-fault-monitoring implications of all this DC storage.

65 J/GPU
rack-level capacitor energy storage in GB300 NVL72 power shelves (NVIDIA design figure); ~half the PSU volume is capacitance
30%
peak grid-demand cut while training Megatron-LLM, measured on a GB200 rack fitted with the GB300 power shelf
Scope & caveats

NVIDIA's July 2025 demonstration instrumented a GB200 rack carrying the new GB300 power shelf and ran a Megatron workload. It does not compare a GB300 rack with a GB200 rack. It covers one workload on one instrumented setup, so test the installed load and smoothing controls rather than budgeting the reduction from the rack model.

~400 J/GPU
rack-level capacitor energy storage in Vera Rubin NVL72 (~6× GB300), per NVIDIA's Vera Rubin POD post
Scope & caveats

NVIDIA's design figure for the Vera Rubin power-shelf PSU capacitor system, from its Vera Rubin POD post of 16 March 2026; the same post says it cuts peak current demand by up to 25%. This is NVIDIA's design statement, not an independent field measurement. CoreWeave announced the initial bring-up and validation of Vera Rubin NVL72 racks on 1 June 2026, and NVIDIA's quarterly report dated 26 August 2026 says production shipments began in its fiscal third quarter of 2027. Shipping racks are not an independent test of the reservoir.

<2 ms ramp after ~2 ms qualification
ORV3 BBU v1.4 ramp to full power after the low-voltage qualification interval (OCP specification, September 2023); ≥46 V bus requirement
Scope & caveats

48 V-class ORV3 BBU interface; ramp is not total detection/transfer time. The separate PSU efficiency specification is not part of this claim.

up to 97% VFI vs >99% ECO/VFD
Liebert EXL S1 UPS efficiency in double-conversion (VFI) and ECO modes; a central UPS figure, not the ORV3 BBU
Scope & caveats

Vertiv's ratings for the Liebert EXL S1 625-1200 kVA; efficiency changes with loading. Vertiv rates Dynamic Online (VI with VFI support) separately at up to 99%; it relies on instantaneous inverter takeover rather than a transfer. Loss as a share of input is 1 minus the efficiency; as a share of output it is 1/efficiency minus 1, or 3.09% at 97%. Checked against the datasheet on 2026-10-13.

~50% / 2–3%estimate
estimated cut in battery capacity and in double-conversion loss when distributed storage replaces duplicated central UPS batteries (SemiAnalysis)
Scope & caveats

SemiAnalysis analyst estimate, not a field measurement. Dropping the separate A-side and B-side central UPS batteries yields the roughly 50% capacity reduction, and removing the central AC-DC-AC pair avoids its 2-3% loss. The installed result depends on the runtime and redundancy you need and on any central conversion you keep.

~1,500 MW
data-center demand that left the grid on July 10, 2024, as sites transferred to backup during normally cleared faults
Scope & caveats

Load loss as seen by the grid. NERC's incident review ("Load Details") found the affected data centers transferred their loads to backup power (static UPS, decentralized rack UPS or DRUPS) in response to the disturbance. The figure is lost demand at the interconnection, not an IT outage or a restart of training jobs.

About 1,500 MW is the total customer-side load reduction across the six-fault sequence. About 1,260 MW, at the third voltage depression, stayed off the grid for hours. The 2026-07-22 Ashburn event, about 3.8 GW from one normally cleared fault, was roughly 2.5 times the 2024 scale.

Metering, acceptance, and contracting the transient claim

A transient-absorption architecture you cannot measure is a liability, not an asset. The whole capital case (a tighter provisioning ratio, a smaller grid connection, a tenant SLA on power quality) rests on the claim that the storage stack actually flattens the peak. So this chapter owns the metering and acceptance hooks, even though the broader power-quality monitoring layer is covered downstream. Three artifacts make the claim defensible:

  • Sub-cycle metering at the meter and the rack. Capture the load step, not just the average: high-rate power and busbar-voltage telemetry that shows the BBU triggering, the busbar holding ≥46 V and the smoothed waveform the transformer actually sees. NVIDIA SMI or Redfish configure the smoothing parameters and power caps, while the fast smoothing loop itself runs locally. The capacitor's charge management and the GPU's ramp and burn control are separate loops, and the GPU-side loop combines a software driver with a hardware burner. Closed-loop control depends on the metering data and is itself part of the spine, so outage and undervoltage protection must keep working when the management path is down.
  • Step-load and discharge acceptance tests. Commissioning must prove the relay, not just the runtime: load-bank discharge for ride-through, and explicit step-load tests that inject a synchronized swing and check that each layer hands off cleanly (supercap, BBU, BESS) without a downstream excursion. UPS transfer and generator-pickup tests remain, but the new acceptance criterion is the shape of the absorbed transient. (Chapter 4.8 covers the commissioning sequence for generator and island integration.) For the BESS itself, OCP's white paper Requirements for Energy Storage Systems Used in Data Centers (Rev 1.0, January 2026) works as a requirements checklist covering BESS testing, detection, suppression, ventilation and lithium-battery handling. OCP's new Energy Project, announced in its October 2026 summit review, now hosts that storage workstream; fire code stays in Chapter 6.5.
  • The contract layer. Ramp-rate and flicker behavior at the point of interconnection is increasingly a utility-imposed condition and a tenant-facing SLA. The metered transient signature is what you bring to the interconnection study (Chapter 4.3) and the grid-interactive obligations (Chapter 4.10), and what can turn the storage stack from a cost center into a grid-services revenue line (Chapter 15.8).
The on-die and on-package origin of the transient, the di/dt the capacitance relay starts from, is engineered in Chapter 7.12. Chapter 5.12 covers the cooling-side twin of ride-through. A loss of flow can thermal-trip a GPU in seconds, so any GPU load that stays energized through an outage needs protected pump power or a thermal and load-shedding bridge you have demonstrated. NVIDIA's DSX reference design, for instance, does not back its GPU-side cooling plant with UPS. The non-linear-load harmonics that the same load creates upstream of storage are in Chapter 4.4; the LV busbar and OCP power-shelf detail in Chapter 4.6; the DC-disaggregated sidecar architecture in Chapter 4.7; generator/BESS bridging and island integration in Chapter 4.8; grounding and DC ground-fault monitoring in Chapter 4.11. The grid-facing obligations this storage stack discharges (ride-through, ramp limits, frequency response toward the POI) are in Chapter 4.10 and the NERC framing in Chapter 4.3. The reliability math behind failure-domain size is in Chapter 12.2; the grid-services revenue the stack can earn is in Chapter 15.8.
Cite this chapter
Fehn, J. (2026). UPS & Energy Storage: From Ride-Through to Transient Absorption (Chapter 4.5). The Definitive Guide to AI Data Centers. https://aidatacenterguide.com/part-4-electrical-and-energy-infrastructure/4-5-ups-and-energy-storage-from-ride-through-to-transient-absorption (accessed 2026-10-25).
@misc{aidc-4-5,
  author       = {Fehn, Jacob},
  title        = {UPS & Energy Storage: From Ride-Through to Transient Absorption (Chapter 4.5)},
  howpublished = {The Definitive Guide to AI Data Centers},
  year         = {2026},
  url          = {https://aidatacenterguide.com/part-4-electrical-and-energy-infrastructure/4-5-ups-and-energy-storage-from-ride-through-to-transient-absorption},
  note         = {Accessed 2026-10-25}
}
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