The Definitive Guide toAI Data Centers
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Chapter 16.3

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Software, Orchestration & Efficiency at the Frontier

Algorithmic efficiency, orchestration and power-aware scheduling can move unit economics as much as a hardware generation. Whether demand re-absorbs each gain decides the capacity you still need. A stack frozen at commissioning leaves you power-bound and under-utilized.

ThreadsGoodputPower-boundDensity ramp

What you'll decide here

  1. Budget against today's $/token or the ~10x/yr deflation curve. Undercount it and you over-build; overcount it and software frees less capacity than you counted on.
  2. How much of the fleet to provision for reasoning (test-time-compute) decode. NVIDIA’s over-100× challenging-query figure is a workload example, not a tokens-per-query multiplier.
  3. Which orchestration plane (Slurm-lineage, Kubernetes-native or converged) lifts measured utilization most cheaply. Size the useful-output target to your own pro-forma, not a generic 85–90%.
  4. Power-bound (over-subscribe, cap and schedule to the grid) or capacity-bound (provision to peak): the single biggest tokens-per-megawatt lever once the substation is the constraint.
  5. How much portability to buy (vendor-neutral runtimes, a layer over CUDA) against lost velocity, and whether your energy/carbon FinOps can see the answer.

Every other part of this guide buys capacity with concrete, copper and silicon, assets that depreciate from the day they are energized. This chapter covers the one layer that moves the other way. Software can improve an installed AI factory between hardware generations, and the rate is not marginal. The compute needed to reach a fixed level of model quality has been halving roughly every eight months in pre-training, about three times faster than Moore's Law (Epoch AI, Mar 2024). Combined with cheaper hardware, that cut the cost of serving a GPT-3-quality token by something on the order of 10x a year from 2021 through 2024 (a16z, November 2024). Buyers see far less relief, because they keep moving to newer models. Across the businesses Ramp observes, its effective token-price index fell 41% from March to September 2026 (Chapter 1.3). An operator who scopes a facility against today's cost-per-token, and assumes it holds, is modeling a world that will not exist by the time the slab cures.

The rest of the chapter follows the layer that turns watts into tokens. It covers the Jevons-rebound scenario, in which sufficiently elastic demand turns efficiency into more consumption; the reasoning / test-time-compute shift that moves the fleet from prefill-heavy to decode-heavy; utilization as the hidden ROI lever, and the orchestration plane that moves it; power-aware orchestration, once the substation rather than the chip is the binding constraint; and the portability vs CUDA-moat fork that decides whether your software stack is an asset or a leash.

The efficiency curve vs demand: when Jevons eats the win

The biggest uncertainty in AI infrastructure planning is whether cheaper compute reduces aggregate spend or unlocks enough demand to raise it. The Jevons rebound is the upside-consumption scenario: when demand is sufficiently elastic, efficiency gains increase total use even as unit cost falls. It runs on three compounding curves at once. Algorithmic efficiency: the compute to hit a fixed capability halves about every eight months (95% CI 5-14 months; Epoch AI, Mar 2024), which is the same as effective compute doubling on that clock. Inference cost at fixed quality has fallen roughly an order of magnitude per year (a16z, 2021-2024 series, November 2024; Epoch's threshold-by-threshold price series runs ~9x to ~900x/yr). Hardware efficiency: each accelerator generation roughly doubles useful FLOPS/watt, and each precision step-down (BF16 -> FP8 -> NVFP4) roughly doubles tensor-core throughput again. Price: the curves combine into the ~1,000x three-year drop in the cost of a GPT-3-quality token, from ~$60/M to ~$0.06/M (a16z, November 2024).

If you scope the facility against falling cost-per-token, you must scope demand against the elasticity that the falling cost unlocks. When a capability gets 10x cheaper, the set of economically viable applications expands. Aggregate token spend rises only if usage grows by more than 10x, stays flat if usage grows by exactly 10x, and falls if usage grows by less. DeepSeek’s early-2025 release cut inference cost sharply, yet the largest US cloud and AI companies did not cut their 2025 capex plans, and the ones announced in the following weeks ran above 2024 spending. That fits a rebound story but does not prove one, since the budgets were already in motion. Next year's algorithmic win lets you serve more tokens per megawatt. Whether that reduces required capacity or expands consumption is the scenario fork developed in Chapter 16.5. → demand framing in Chapter 1.3; macro curve in Chapter 16.1.

Reasoning and test-time compute: the decode-heavy future

If algorithmic efficiency is the deflationary force, test-time compute is the workload-dependent inflationary counterforce: hard queries can consume far more inference compute even as efficiency lowers the cost of each pass. The 2024-2025 shift was the discovery that you can buy capability at inference time by letting a model think longer: extended chain-of-thought, sampling and self-consistency, tree search, tool-use loops. The infrastructure consequence is a change in the shape of the workload. For exceptionally complex tasks, NVIDIA’s February 12, 2025 example says long thinking can require over 100× the compute of a single inference pass. Agentic workflows compound it, chaining many such calls per user action. Deloitte's November 2025 outlook forecasts inference at about two-thirds of AI compute in 2026, up from roughly one-half in 2025 and one-third in 2023. It expects almost all 2026 AI computing to run in giant AI data centers or on high-end enterprise servers. That is a compute-share forecast, not a measured power draw (Deloitte TMT Predictions 2026).

Long-output reasoning can leave the fleet that serves it decode-bound. Long inputs can instead make prefill the gate (an agentic loop sends its whole, growing context again with each call), and so can batching or the choice of model. Prefill (processing the prompt) is compute-bound and parallel. Decode (generating tokens one at a time) is memory-bandwidth-bound and serial, and it is the phase a reasoning model spends almost all of its time in. A decode-dominant fleet is sized differently. It values HBM bandwidth and capacity over raw FLOPS, lives or dies on KV-cache management, and benefits from prefill/decode disaggregation, where the two phases run on separately optimized pools connected by a fast KV-cache transport rather than sharing one engine. Scope a fleet for short, prefill-heavy completions and the reasoning era will find you HBM-starved and KV-thrashed. → inference economics in Chapter 1.3; serving engineering in Chapter 10.11.

Prefill vs decode: why the reasoning era changes what you optimize
PropertyPrefill (prompt processing)Decode (token generation)
BottleneckCompute-bound (tensor cores, FLOPS)Memory-bandwidth-bound (HBM, KV-cache)
ParallelismHighly parallel across prompt tokensSerial — one token at a time, autoregressive
Reasoning impactRoughly fixed per queryNVIDIA, February 2025: over 100× compute for an exceptionally challenging query; not a token or fleet factor
Hardware it rewardsPeak FP4/FP8 throughputHBM bandwidth & capacity, large scale-up domains
Optimization leverBatching, chunked prefillKV-cache paging/offload, speculative decode, EP width
Disaggregation fitContext/prefill poolGeneration/decode pool, KV transported in
The two phases of LLM inference have opposite bottlenecks, and reasoning/test-time compute shifts the fleet's center of gravity toward decode. The decode-column compute figure is NVIDIA's example; the key numbers give its source.

Utilization: the hidden ROI lever, and the orchestration plane that moves it

Cost-per-token has a numerator (the cost stack) and a denominator (tokens actually produced), and most decks never show the number that dominates the denominator: utilization. MegaScale (ByteDance and Peking University) measured 55.2% model-FLOPs utilization for a named 175B-parameter training run on 12,288 GPUs. Utilization claims must name the metric, workload, window and denominator. Lower useful output spreads the same fixed acquisition and staffing cash across fewer paid tokens; Chapter 1.8 prices that effect and Chapter 2.5 tests the resulting debt coverage. Moving utilization ten points can spread fixed cost across substantially more useful output, but the return must still be compared with the actual cooling, fabric and siting alternatives. → the breakeven math in Chapter 1.8.

Utilization is won or lost in the orchestration plane, the scheduler that decides which job runs on which GPUs, when, and at what fraction. The industry is converging here from two lineages. Slurm and its descendants come from HPC: batch-oriented, gang-scheduling (all-or-nothing allocation of a tightly coupled job) and topology-aware down to the NVLink domain. Slurm is still the dominant scheduler in large training fleets. Kubernetes comes from cloud-native serving: declarative, elastic, ideal for bursty inference and multi-tenancy, but historically weak on gang semantics and topology. AI-native schedulers (KAI, Run:ai, Volcano) are closing those gaps by adding gang scheduling, fair-share quota, bin-packing, fractional-GPU sharing and topology awareness on top. The 2026 reality is convergence: Slurm-on-Kubernetes bridges and operators let one cluster run batch training and elastic inference under a single control plane. → the scheduling plane in Chapter 10.1; topology-aware allocation in Chapter 10.2.

Orchestration plane: the Slurm vs Kubernetes vs converged fork
DimensionSlurm-lineage (HPC)Kubernetes-native (cloud)Converged (Slurm-on-K8s)
Native workloadTightly-coupled trainingBursty / multi-tenant inferenceBoth on one control plane
Gang schedulingFirst-class (all-or-nothing)Bolt-on (KAI / Volcano / Kueue)First-class via bridge
Topology awarenessMature — NVLink-domain block schedulingMaturing (DRA, topology hints)Inherited from Slurm side
Elasticity / scale-to-zeroWeakStrongStrong for inference tier
Multi-tenancy & quotaAccounts/QOS, coarserNamespaces, RBAC, fine-grainedNamespace + Slurm accounting
Where it dominates (2026)Large synchronous training fleetsInference and multi-tenant fleets, risingFast-growing middle
Best whenPre-training is the dominant jobInference/agentic fleet, many tenantsMixed fleet, want one substrate
The scheduler choice sets how cheaply you lift utilization and which workloads share a fabric. Positioning reflects 2026 practitioner reporting (HPCwire). No dated install census establishes market shares, and the decision is rarely either/or: convergence is the trend.

The scheduler is necessary but not sufficient. Real utilization is throttled by badput, the fraction of GPU-hours that produce no useful work because a job failed, restarted, drained or stalled. Its counterpart is goodput: useful work delivered within the job's quality and service limits or, as a time fraction, the share of wall-clock time that actually advances the job. Goodput is not MFU, which measures how much of peak FLOPS the work uses. In Google's framing, effective ML productivity is goodput, and an interruption that forces a synchronous job to restart loses the work since its last checkpoint; local recovery costs less. ClusterMAX provider tiers and marketed examples can motivate a 90%-versus-96% sensitivity, but they establish neither an industry average nor a portable best-in-class floor. Put your own fleet's measured productive time and badput categories into TCO. Orchestration and reliability are therefore one problem: lifting utilization means raising goodput, which means fast checkpointing, hot spares, autonomous fault recovery and topology-aware re-scheduling around failed NVSwitch trays. → goodput vs availability in Chapter 12.2; checkpointing in Chapter 9.4; fleet recovery in Chapter 10.7.

~8 monthsestimate
Halving time of the compute needed for a fixed model capability (95% CI 5-14 mo); ~3x faster than Moore's Law
Scope & caveats

Estimated historical reduction in pre-training compute required to reach a fixed language-model performance level, with wide uncertainty (95% CI 5-14 months). Not a measure of tokens-per-watt improvement on an installed serving fleet.

~9–900x/yr by threshold
LLMflation: GPT-3-level token cost fell ~1,000x in 3 yr, ~$60 to ~$0.06/M (~10x/yr, a16z); Epoch: ~9–900x/yr by threshold
Scope & caveats

The headline rate depends entirely on the basis. a16z's original 'LLMflation' series tracks GPT-3-level quality and gives ~10x/yr (~1,000x over three years, ~$60 to ~$0.06 per million tokens); Epoch AI's cross-benchmark median is nearer ~50x/yr, ~40x/yr at the GPT-4-level GPQA Diamond threshold, and ~9x to ~900x/yr across thresholds. Always state which basis a quoted rate uses — these are not restatements of one measurement.

Over 100× compute in a challenging-query exampleestimate
NVIDIA’s challenging-query compute example; no fleet-wide token multiplier
Scope & caveats

NVIDIA’s exceptionally challenging-query illustration. An open-ended verbal example is not an exact 100× interval, a tokens/query measure or a fleet multiplier.

~2/3forecast
Deloitte forecast: inference share of AI compute in 2026; not measured operator power draw
Scope & caveats

Deloitte’s November 2025 prediction for inference as a share of AI compute in 2026. Not an observed fleet share, installed capacity, energy or instantaneous electrical draw. The forecast does not allocate an individual fleet.

A forecast for calendar 2026, not an observed 2026 outcome.

55.2% MFU (named MegaScale run)
Training MFU on a named MegaScale run (ByteDance / Peking University); stricter than device-utilization figures usually quoted for enterprise clusters
Scope & caveats

Do not compare MFU, SM activity, tensor activity, allocation utilization and goodput as one metric.

~3% training / ~21% inference
Unused power headroom in POLCA’s studied 2024 fleets: training vs inference; no design allowance
Scope & caveats

Headroom is 100% minus the row-level peak power utilization POLCA reports: 97% for training, 79% for inference (Patel et al., ASPLOS 2024), in historical fleets. Low headroom does not mean small swings: in the same table, training's largest 2-second power spike was 37.5% of provisioned power against 9% for inference. POLCA separately simulated 30% additional provisioned servers under specific controls. Neither headroom figure is a deployable allowance for a 2026 reasoning, MoE, or disaggregated fleet: derive that from the proposed fleet's measured coincident demand, its tested protection and capping response, and the serving degradation you will allow.

Power-aware orchestration: scheduling against the substation

Once the binding constraint moves from chips to megawatts, the defining condition of the 2026 era, the orchestration plane inherits a second job it never had in HPC: scheduling against the electrical limit, not just the silicon. You can run the cluster capacity-bound, provisioning power to the rated peak of every accelerator and leaving headroom unused. Or you can run it power-bound, deliberately over-subscribing the electrical capacity and using software to keep aggregate draw inside the substation's limit. The second path is where tokens-per-megawatt, the metric that governs once power is the scarce input, is won.

The workload determines how much headroom there is to harvest. Synchronous training produces enormous correlated power swings: thousands of GPUs hit a collective at the same instant, so the fleet's instantaneous peak is close to the sum of its parts. POLCA measured ~3% unused power headroom in its studied training fleet, and that statistic is not the margin before your protection trips. Inference is the opposite. Request arrivals are uncorrelated and per-server peaks rarely coincide, and POLCA measured ~21% headroom in its studied inference fleet. Microsoft’s POLCA separately simulated roughly 30% more provisioned servers under its power controls and workloads (Patel et al., POLCA, ASPLOS 2024; arXiv 2308.12908). So an inference fleet is a strong candidate for power over-subscription and a training fleet is not. Mis-applying one regime to the other either strands megawatts (capacity-binding inference) or trips the cluster (over-subscribing training).

These swings matter for reliability too, but the two big grid load-loss events came from a different mechanism than workload ramps. In July 2024 a six-fault, 82-second sequence on a Virginia 230 kV line took about 1.5 GW of data-center demand off the grid as sites transferred to backup. Ashburn on 2026-07-22 was larger: one normally cleared fault, and about 3.8 GW left the grid the same way. The 2024 event was one of the drivers of NERC’s May 2026 Level 3 alert. Ride-through is now a binding rule in parts of the US. In ERCOT, non-exempt new Large Computational Loads of 75 MW or more must, since 2026-08-01, stay connected through specified voltage sags and then restore demand inside set time limits (NOGRR 282). SPP’s rules cover new high-impact large loads requested from 2026-01-15. PJM has only proposed rules (2026-09-08). NERC's computational-load standards passed final ballot in October 2026 but still await Board adoption and FERC approval. Neither those standards nor FERC's RD26-7-000 order specifies a ride-through curve (regulatory status: Chapter 4.10). Workload-induced ramps are their own mechanism: test voltage ride-through and backup transfer as separate behaviors. Power-aware orchestration also means smoothing: stagger collective phases, ramp job starts and hold floor load with synthetic work, so the facility looks grid-friendly. The orchestration plane thus becomes a grid-services participant: it can shed, cap or shift flexible (batch, training-checkpoint) load to monetize demand response and unlock interconnection headroom. → grid impact and the loss-event problem in Chapter 15.8; the power-bound thesis in Chapter 16.1; transient absorption and ride-through engineering in Chapter 4.5 and Chapter 4.10.

Deep dive: KV-cache as the new memory hierarchy, and why it is a software-efficiency lever, not a storage line item

The decode-heavy future makes the KV-cache, the per-request store of attention keys and values, the dominant source of memory pressure in inference serving. Managing it well is one of the highest-leverage software efficiency moves available in 2026. Naive serving pins each request's KV-cache in HBM for the life of the generation. With reasoning traces running to tens of thousands of tokens, that sharply caps the number of concurrent users and wastes HBM to fragmentation. The software response is a three-part hierarchy. PagedAttention (vLLM) treats KV-cache like virtual memory: non-contiguous pages, near-zero waste, and continuous batching of new requests into the gaps. Prefix caching reuses the KV of shared prompt prefixes (system prompts, few-shot exemplars, agent scaffolds) across requests, turning a recomputation into a lookup. KV offload tiers cold cache out of HBM to host DRAM, local NVMe or an Ethernet-attached flash tier (NVIDIA's BlueField-4 / CMX class), at the cost of a transport hop. Whether offload pays depends on the prefix-hit rate and on prefix transfer time against the time-to-first-token budget (Chapter 9.7).

This belongs in an efficiency chapter and not a storage chapter because KV management is a software decision that moves tokens-per-GPU-second on reuse-heavy serving workloads with no hardware change. It is also why prefill/decode disaggregation pays off. Once decode is its own pool, the KV-cache transport (NIXL-class, over NVLink/RDMA/CXL) becomes a first-class scheduling object, and the orchestrator schedules KV locality the way an HPC scheduler schedules data locality. Get this wrong and a fleet with abundant FLOPS can sit HBM-bound despite available compute. Measure the size of that throughput loss on your own workload trace. → inference serving in Chapter 10.11; the inference-storage tier in Chapter 9.7.

Run the memory and migration tests before buying the gain. Chapter 7.6 sizes weights, active KV and workspace at the chosen precision and concurrency; Chapter 7.9 owns the software acceptance comparison across NVIDIA CUDA, AMD ROCm, Google XLA/TPU and AWS Neuron/Trainium. Here the result is an operating choice: replay the same quality-approved workload and record useful output, p99 latency, joules, failures and staff time on each candidate revision. Keep the new revision only if the gain survives those fixed boundaries and pays for migration and rollback capacity. Reject an apparent tokens-per-second win that changes model quality or exceeds the latency budget. Paging, prefix reuse and offload are mechanisms to test against those budgets, not independent multipliers to stack. Feed the accepted gain into the demand scenarios of Chapter 16.5.

Ask a vendor that cites benchmarks for complete-system, API-level results. The September 2026 round, MLPerf Inference v6.1, brought an end-to-end RAG benchmark and an edge agentic test. More than half of the 30 submitters used the new API-centric harness. MLCommons says the Endpoints benchmark will take over from Inference for the data center. A tokens-per-second figure for a single model leaves out ingestion, retrieval and tool-call latency.

Software portability, the CUDA moat, and the cost of lock-in

The efficiency story has an uncomfortable corollary: most of it is realized through one vendor's software stack. CUDA is not a compatibility layer, it is a moat: nearly twenty years of kernels, libraries (cuDNN, CUTLASS, NCCL) and a runtime that the whole training-and-inference toolchain (PyTorch, vLLM, TensorRT-LLM) is tuned against first. The moat shows up as a realized-performance gap, not a paper-FLOPS gap, and the gap moves with the software date. By mid-2026, AMD's MI355X on ROCm matched or undercut B200's cost per token on some models and trailed badly on others. On DeepSeek V4, MI355X's per-user token rate rose more than 100x in the model's first month (SemiAnalysis, May–October 2026; Chapter 7.9). Compare at matched model, precision, batch and concurrency, latency target, software revision and cost basis before pricing the gap. Where the shortfall appears, it is the lock-in tax made measurable, not a portable discount across inference. ROCm is closing it, and Google's XLA/TPU and AWS Neuron/Trainium stacks are mature within their own ecosystems. But each non-NVIDIA path trades any quoted hardware-cost saving for porting work on its own stack (ROCm, XLA or Neuron) and a portability ceiling, and a matched complete-system quote and useful-output test must earn back that burden.

Portability is an option you buy at the cost of velocity. Standardize on a vendor-neutral runtime (an abstraction layer, open serving stacks like vLLM that target multiple backends, or framework-level portability) and you preserve the ability to dual-source accelerators, arbitrage price across vendors and survive a supply-allocation shock. But you must measure any performance loss against vendor-native kernels at the same model quality, context, concurrency and SLO, and you carry the maintenance cost of a second toolchain. Lock to the moat and you get maximum velocity and the deepest library support, at the price of pricing power surrendered to a single supplier and a fleet that cannot migrate. Vendor concentration now reaches the scheduler too: NVIDIA has owned SchedMD, Slurm's developer, since December 2025 and has committed to keeping Slurm open source and vendor-neutral (Chapter 10.1). That is NVIDIA's own pledge, with no independent body to enforce it, so a fleet that plans to dual-source accelerators should confirm with each Slurm release that the features it relies on still work on its non-NVIDIA hardware. For most operators the rational posture is portability at the serving layer (where the workload is commoditizing fastest) and native at the frontier-training layer (where a measured MFU gain may earn back the lock-in cost). → software ecosystems and lock-in in Chapter 7.9; the node software stack in Chapter 10.4.

Energy and carbon FinOps: you cannot optimize what you do not meter

The final software layer closes the loop between tokens and watts: energy and carbon FinOps, the practice of attributing energy, cost and emissions down to the job, the model and the tenant, then scheduling against those signals. The instrumentation matters because the obvious facility metric is going stale. PUE is increasingly inadequate for liquid-cooled AI. As cooling overhead shrinks (some DLC design claims sit near 1.05-1.15 under the boundary each claim defines), nearly all the energy is IT load, so a flat PUE hides the question that now matters: how much useful work per joule of IT energy. The field is shifting toward work-based and total-energy metrics (TUE, tokens-per-kWh, carbon-per-token) because the efficiency frontier has moved inside the IT load, where PUE cannot see. → the post-PUE metric stack in Chapter 15.1.

FinOps-grade metering turns three otherwise invisible levers. Carbon-aware scheduling shifts flexible batch and training-checkpoint load to hours and regions with cleaner grid mix. That may improve the 24/7 carbon-free-energy score if eligible attributes cover the destination hours, though recovery energy and the actual inventory boundary still count. Cost-aware admission prices GPU-hours by real-time energy cost and lets the scheduler defer low-priority work off-peak, the same flexibility that monetizes demand response. Tenant attribution charges tokens at their true energy-and-carbon cost, so the application layer sees the signal and optimizes its own prompts and model choices. Flexibility is only monetizable if it is metered. An operator may shift or cap a job with coarse telemetry, but cannot substantiate its attributed energy bill or carbon benefit without a reconciled allocation. Grid-service settlement follows the tariff’s meter boundary. → carbon and 24/7 CFE in Chapter 15.3; grid services in Chapter 15.8.

This chapter is the software-and-efficiency capstone of Part 16. The subsystem hardware roadmaps it sits on are in Chapter 16.2, and the power-bound thesis it operationalizes is in Chapter 16.1. The demand-side counterpart, why reasoning and test-time compute reshape the load, is framed in Chapter 1.3. The economics that the efficiency curve and utilization decide are scored in Chapter 1.8, and the build-out macro is in Chapter 16.4. The orchestration plane is engineered in Chapter 10.1 and Chapter 10.2; serving and KV-cache in Chapter 10.11; goodput and recovery in Chapter 12.2, Chapter 9.4 and Chapter 10.7; the CUDA-moat fork in Chapter 7.9; and the metrics and carbon levers in Chapter 15.1, Chapter 15.3 and Chapter 15.8. The scenarios these efficiency dynamics feed are drawn in Chapter 16.5.
Cite this chapter
Fehn, J. (2026). Software, Orchestration & Efficiency at the Frontier (Chapter 16.3). The Definitive Guide to AI Data Centers. https://aidatacenterguide.com/part-16-trends-roadmaps-and-the-future/16-3-software-orchestration-and-efficiency-at-the-frontier (accessed 2026-10-25).
@misc{aidc-16-3,
  author       = {Fehn, Jacob},
  title        = {Software, Orchestration & Efficiency at the Frontier (Chapter 16.3)},
  howpublished = {The Definitive Guide to AI Data Centers},
  year         = {2026},
  url          = {https://aidatacenterguide.com/part-16-trends-roadmaps-and-the-future/16-3-software-orchestration-and-efficiency-at-the-frontier},
  note         = {Accessed 2026-10-25}
}
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